A method which has typically been used to register a particle beam to a photoresist-coated blank substrate or to an existing pattern employs use of the particle beam itself. This approach typically utilizes a back-scatter detector, where particles that experience high-angle scattering events with the target are collected. The particle beam is scanned in a raster pattern over an alignment target, and a back-scatter “image” is generated from the detector signal, where the brightness of each pixel is determined by the number of particles striking the detector in a time period corresponding to that pixel. This self-alignment method is limited by poor contrast with respect to noise. Further, to avoid incidental exposure of a photoresist-coated blank substrate, the alignment targets must be placed outside of the portions of the photoresist which are to be imaged.
When the substrate is a lithographic mask, and the particle beam is comprised of electrons, in a region of a mask covered with chrome, relatively few back-scattered electrons result from the chrome, because the chrome is thin and the scattering cross-section is small, owing to the high electron beam energy. Many more back-scattered electrons result from the underlying silicon dioxide (and other oxides) present in the mask structure, because the silicon dioxide portion of the structure is very thick compared to the chrome layer (about 50,000 times thicker). Consequently, a target area where no chrome is present scatters nearly as many electrons as a region where chrome is present. As a result, use of this technique to determine whether a pattern which is being created is in alignment with alignment targets present inside an area of photomask which is being imaged is difficult, since the back-scatter image of the targets typically provides poor contrast which makes determining of a centroid location of an alignment target difficult. Further, use of an alignment target which is present in an area of photoresist which is being imaged causes exposure of the photoresist, and the pattern which is generated suffers.
When the particle beam used to create the pattern is an electron beam, another problem is the thermal expansion of the substrate during creation of the pattern. This makes it difficult to register an electron beam to write a pattern in a proper relationship to a planned pattern alignment on the substrate, using the electron beam itself as a reference. U.S. Pat. No. 6,424,879 to Chilese et al., issued Jul. 23, 2002, describes an electron beam writing system which includes an electron beam patterning machine operable to emit an electron beam to form a pattern on a substrate. A computer control system, coupled to the electron beam patterning machine, has a plurality of pre-computed distortion maps. Each distortion map describes expected distortions of the substrate caused by exposure of the substrate to the electron beam. The computer control system controls the electron beam patterning machine using the distortion maps in order to adjust for the expected distortions. The invention makes use of one or more pre-computed distortion maps which describe the thermal and/or mechanical responses of a substrate to electron beam patterning. The distortion maps are used, in conjunction with pattern writing data, to determine the distortions expected in a patterning process, so that adjustments can be made. Because the distortion maps are pre-computed, the computational time required to calculate the thermal distortions is significantly reduced.
The concept of correcting for distortions which will occur during writing of an image on a substrate based on data obtained during writing of that same image on an equivalent substrate at an earlier time is also discussed in U.S. Pat. No. 6,883,138 issued to Sandstrom et al. on Apr. 19, 2005. In particular, the invention is said to relate to a method and a system for predicting and correcting geometrical errors in lithography using masks, such as large-area photomasks or reticles, and exposure stations, such as wafer steppers or projection aligners. The method comprises the steps of collecting information about a mask substrate, mask writer, an exposure station, and/or about behavior of a processing step that will occur after the writing of the mask. Further the method comprises predicting, from the combined information, distortions which will occur in the pattern when it is subsequently printed on the workpiece; calculating from the prediction a correction to diminish the predicted distortion, and exposing the pattern onto the mask substrate while applying the correction for the predicted distortions.
Fabrication of a semiconductor device or a photomask/reticle is a complicated process involving a number of interrelated steps which affect the feature placements or the critical dimensions of various patterns produced. Whether the feature placements or the critical dimensions at issue are those of patterns on a semiconductor wafer, or those of patterns on a reticle used to pattern a semiconductor wafer, the semiconductor device may not meet specification if related patterns of materials on multiple layers within the device are not properly aligned. An ability to adjust the alignment of a newly forming pattern relative to alignment targets present inside an area of substrate to be patterned permits compensation for changing process conditions during imaging of the pattern in a photoresist. This makes it possible to correct for drift, thermal expansion, or gravitational sag, for example, during imaging of the photoresist, whether the process is direct semiconductor device manufacturing or reticle (photomask) fabrication. The reproducibility of the manufacturing process itself may be improved, including the process window. Process window refers to the amount process conditions can be varied without having a detrimental outcome on the product produced. The larger the processing window, the greater change permitted in processing conditions without a detrimental affect on the product. Thus, the ability to adjust a pattern alignment to a target present in an area of pattern formation, during that pattern formation is especially valuable in terms of processing window. A broader processing window generally results in a higher yield of in-specification product produced.
It would be highly desirable to be able to use internal pattern alignment targets which are present within areas of a substrate which are to be patterned. It would also be desirable to be able to periodically reassess the relative geometrical locations of a pattern being formed relative to internal alignment targets, so that more precise corrections can be made for drift, thermal expansion, gravitational sag, or other changes which affect the alignment of a forming pattern (an, image in a photoresist, for example) during fabrication.